Efficient Design of Reversible Sequential Circuit
نویسندگان
چکیده
منابع مشابه
Efficient Design of Reversible Sequential Circuit
Reversible logic has come to the forefront of theoretical and applied research today. Although many researchers are investigating techniques to synthesize reversible combinational logic, there is little work in the area of sequential reversible logic. Latches and flip-flops are the most significant memory elements for the forthcoming sequential memory elements. In this paper, we proposed two ne...
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Adders and multipliers are two main units of the computer arithmetic processors and play an important role in reversible computations. The binary multiplier consists of two main parts, the partial products generation circuit (PPGC) and the reversible parallel adders (RPA). This paper introduces a novel reversible 4×4 multiplier circuit that is based on an advanced PPGC with Peres gates only. Ag...
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Reversible circuits for SR ip op, JK ip op, D ip op, T ip op, Master Slave D ip op and Master Slave JK ip op have been provided with three di erent logical approaches. All the circuits have been optimized with the help of existing local optimization algorithms (e.g. template matching, moving rule and deletion rule) and the optimized sequential circuits have been compared with the earlier propos...
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Reversible sequential circuits are going to be the significant memory blocks for the forthcoming computing devices for their ultra low power consumption. Therefore design of various types of latches has been considered a major objective for the researchers quite a long time. In this paper we proposed efficient design of reversible sequential circuits that are optimized in terms of quantum cost,...
متن کاملUnit6-Design of Sequential Circuit
1. Input output relation 2. State transition diagram or Algorithmic State Machine (ASM)chart 3. State synthesis table a. Flip Flop based implementationexcitation tables are used to generate design equations through Karnaugh Map b. Read Only Memory (ROM) based implementationexcitation tables are not required but flip-flops are used as delay elements 4. Circuit diagram is developed from these des...
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ژورنال
عنوان ژورنال: IOSR Journal of Computer Engineering
سال: 2012
ISSN: 2278-8727,2278-0661
DOI: 10.9790/0661-0564247